Getting started with the ULX3S is easy! You just need a Verilog source code file and the constraint file.
To program the FPGA on the ULX3S, either the commercial Lattice Diamond or Open Source tools such as yosys, nextpnr and fujprog are needed.
If you've never worked with FPGA devices, they are programmed with a hardware definition language or "HDL", that may look like a traditional programming language - however it is quite different. The "code" is really just a clever shorthand for how circuits and logic gates are connected. Verilog is one type of HDL.
You can learn more at sites such as fpga4fun, asic-world digital logic, asic-world verilog and nandland.
Once you have your circuit logic generically defined properly in a Verilog file, the hardware-specific constraint file is used to connect the inputs and outputs of the Verilog code to physical pins on the FPGA device.
Here is a collection of various ULX3S examples to get started: