With this package you will be able to instantiate a processor system for Zynq devices without Block design and other Vivado ugly stuff.
Currently, It just supports AXI interfaces, clocks, irq and reset signals.
nMigen support for Xilinx Zynq devices
With this package you will be able to instantiate a processor system for Zynq devices without Block design and other Vivado ugly stuff.
Currently, It just supports AXI interfaces, clocks, irq and reset signals.
nMigen support for Xilinx Zynq devices
Other