sakshamssy

Leetcode-Solutions

My Submissions for over 1200 Leetcode Problems

fpga_image_processing

IP operations in verilog (simulation and implementation on ice40)

exposure_fusion

Python implementation of exposure fusion of multiple images

rawhdr

A simple HDR image merger that converts multiple RAW files into a single HDR image.

Retinex-Image-Enhancement

Practical Implementation of Single Scale Retinex and Multiscale Retinex Algorithm in Python 3

computer-architecture-and-systems-resources

A curated list of Computer Architecture and Systems resources

SuperScalar-RISCV-CPU

SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

fpu

synthesiseable ieee 754 floating point library in verilog

ridecore

RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.

Verilog-Practice

HDLBits website practices & solutions

verilog

Repository for basic (and not so basic) Verilog blocks with high re-use potential

hdl

HDL libraries and projects

arl

lists of most popular repositories for most favoured programming languages (according to StackOverflow)

XilFPGAdev

Image-Conv-VHDL

Implementation of a 2D Convolution Filter using VHDL for FPGAs.

2dconv-FPGA

A 2D convolution hardware implementation written in Verilog

FPGAandImage

image processing based FPGA

FPGA_rtime_HDR_video

FPGA_rtime_HDR_video

We are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA.

Image-Processing

Image Processing Toolbox in Verilog using Basys3 FPGA

Image-Processing-on-FPGA

An efficient FPGA-based design and implementation of image processing algorithm is presented using verilog hardware description language on Xilinx Vivado.

HDR-Imaging-with-FPGA

High Dynamic Range imaging with Altera DE2-115.

samplecode

This repository contains sample code for different Numato Lab products

fpga-hls-libraries

fpga-hls-examples

Open-Source HLS Examples for Microchip FPGAs

exposure-fusion

Exposure Fusion in Matlab

Digital-Image-Processing-Codes

Codes for image pre-processing

Implementation-of-an-Edge-Detection-Filter-Using-the-Avalon-Interface

Implementation of an Edge Detection Filter Using the Avalon Interface

sobel-edge-detector

Sobel is first order or gradient based edge operator for images and it is implemented using verilog.

fractional-phase-locked-loop