Saadia Hassan (Saadia-Hassan)

Saadia-Hassan

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Location:India

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Saadia Hassan's repositories

Application_of_FFT_with_FIR_filter

This project will walk you through the importance of Fast Fourier Transform (FFT) which is one of the major computation techniques in the world of Digital Signal Processing (DSP). It also explains how 'Filter Design Toolbox' can be made use of in MATLAB to design desired filters on the go.

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Authentication_based_unlocking_using_8051

This project is built in order to understand the basic working principles of 8051 and get familiarized with the IO pins of 8051.

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8x8Multiplier-Using-Vedic-Mathematics

An 8-bit multiplier is synthesized and simulated in Xilinx ISE using Verilog HDL. The multiplication is performed using Vedic Mathematics which is proved to consume less power and faster than conventional multipliers.

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ML-Classifiers

A simple classification problem where SVM, Logistic Regression, KNN and Decision Trees algorithms are used and the F1-score with Jaccard similarity scores are found out.

Language:Jupyter NotebookStargazers:2Issues:1Issues:1

Simulation-of-Memristor-Based-Full-Adder

LTSpice simulation software is used to study the behavior of a Memristor. Different logic gates like NOR, NAND and XOR were modelled and simulated followed by the simulation of a memristor based full-adder.

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Traffic-Light-Controller-Using-FSM

An automatic traffic light controller is designed and simulated using the concept of Finite State Machine in ModelSim.

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Types-of-Verification-Using-SRAM

This repo contains golden vector and randomization testbenches for SRAM module.

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COVID19-FeedbackApplication

A simple application is developed to get feedback from a user and analyzing the text to predict the sentiment.

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Meme-Generator

MemeGen, a web application is developed where the user gives an image as input and our tool will generate a meme for the user.

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Real-Time-Clock-Module

A real time clock module is designed and simulated in ModelSim. The language used is Verilog HDL.

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