rxf992's starred repositories
CVPR2024-Papers-with-Code
CVPR 2024 论文和开源项目合集
daily-paper-computer-vision
记录每天整理的计算机视觉/深度学习/机器学习相关方向的论文
logisim-evolution
Digital logic design tool and simulator
ESP32-Developer-Guide
开源一小步之ESP32开发指南
BME280_SensorAPI
Bosch Sensortec BME280 sensor driver. To report issues, go to https://community.bosch-sensortec.com/t5/Bosch-Sensortec-Community/ct-p/bst_community
OnlineJudge
:sparkles: Open source online judge system (based on Microservice). SDUOJ 开源在线评测系统（基于微服务架构）。开源社区QQ群 808751832。示例网站 https://demo.sduoj.com
objectDetectionDatasets
目标检测数据集制作:VOC,COCO,YOLO等常用数据集格式的制作和互相转换脚本
pyqt5-qtquick2-example
A sample of QtQuick 2 providing material and fluent design themes in PyQt5.
PyTorch-Image-Dehazing
PyTorch implementation of some single image dehazing networks.
neural-network-sandbox
A toy about fundamental neural network algorithms and Qt Quick 2 interface.
skydetector
A Python implementation of Sky Region Detection in a Single Image for Autonomous Ground Robot Navigation (Shen and Wang, 2013)
sky_recognition
This project is a demo of sky recognition.
QStyleSheet
StyleSheet for qt apps
System-Monitor
Linux resource monitoring application using C++ with QML
SkyRegionDetection
Sky Region Detection for Day and Night Images with Computer Vision with Python and OpenCV
cpu-datapath-webapp
Interactive CPU Datapath Simulator made to educate students on the MIPS architecture
SystemMonitor
通过/proc文件监测linux系统各项情况
Single-Cycle-CPU-MIPS
Our tasks involved: modeling the designed 32x32-bit register file as one single module in Logisim, designing and modeling a 32-bit ALU to perform all the arithmetic, shift and logic operations required by our data path in Logisim, design and model a datapath for a single-cycle CPU in Logisim, apply the needed values for the control signals needed for the execution of each instruction, design and model the control unit for the designed data path in Logisim, model the single cycle CPU design in Logisim by combining the datapath and control units, then finally testing each task and the correct functionality of the designed CPU by storing all the implemented instructions in the instruction memory and verifying the correct execution of each instruction.