rubinsteina13 / yafpgatetris

Yet Another Tetris on FPGA Implementation

yafpgatetris

Yet Another Tetris on FPGA Implementation

Tetris game made on Terasic DE1-SoC board.

Input: PS/2 keyboard

Output: VGA display (1280x1024)

Screenshot:

Used Quartus 14.1.

Yet Another Tetris on FPGA Implementation

MIT License

Language:Verilog 41.9%Language:SystemVerilog 40.1%Language:Tcl 9.1%Language:Shell 7.5%Language:Python 1.4%Language:Forth 0.0%