rrossi94

OpenFASOC

Fully Open Source FASOC generators built on top of open-source EDA tools

wokwi-verilog-gds-test

foss-asic-tools

FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already installed and ready to use.

sky130_ubuntu_setup

Ubuntu scripts that are used for setting up your machine for Sky130 designs.

caravel_fulgor_opamp

Test Chip General Purpose OpAmp using Skywater SKY130 PDK

caravel_user_project_ldo

Completed LDO Design for Skywaters 130nm

OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

OpenLane

This repo is a fork of the master OpenLANE repo for us with projects submitted on Efabless Open MPW or chipIgnite shuttles:: OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

open_pdks

PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open processes.

skywater-pdk

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

basic_verilog

Must-have verilog systemverilog modules