Roberto Rangel (rrangel5)

rrangel5

Geek Repo

Company:University of Toronto

Location:Toronto, ON

Github PK Tool:Github PK Tool

Roberto Rangel's starred repositories

IOPaint

Image inpainting tool powered by SOTA AI Model. Remove any unwanted object, defect, people from your pictures or erase and replace(powered by stable diffusion) any thing on your pictures.

Language:PythonLicense:Apache-2.0Stargazers:19060Issues:0Issues:0

Java-week-LinuxTips

Repositório com o conteúdo da Java Week da LinuxTips

Language:JavaStargazers:590Issues:0Issues:0

sscs-ose-code-a-chip.github.io

IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)

Language:Jupyter NotebookLicense:Apache-2.0Stargazers:143Issues:0Issues:0

OpenFASOC

Fully Open Source FASOC generators built on top of open-source EDA tools

Language:PythonLicense:Apache-2.0Stargazers:233Issues:0Issues:0

reverse-interview

Questions to ask the company during your interview

License:NOASSERTIONStargazers:27498Issues:0Issues:0

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

Language:AssemblyLicense:NOASSERTIONStargazers:2229Issues:0Issues:0

mriscv

A 32-bit Microcontroller featuring a RISC-V core

Language:VerilogLicense:NOASSERTIONStargazers:146Issues:0Issues:0

C

Collection of various algorithms in mathematics, machine learning, computer science, physics, etc implemented in C for educational purposes.

Language:CLicense:GPL-3.0Stargazers:18961Issues:0Issues:0

bender

A dependency management tool for hardware projects.

Language:RustLicense:Apache-2.0Stargazers:232Issues:0Issues:0

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

Language:SystemVerilogLicense:Apache-2.0Stargazers:1349Issues:0Issues:0

CMOS-SPICE-Model-Collections

MOSIS MPW Test Data and SPICE Models Collections

Language:HTMLLicense:NOASSERTIONStargazers:26Issues:0Issues:0

bacon

Official respository for "Band-limited Coordinate Networks for Multiscale Scene Representation" | CVPR 2022

Language:PythonStargazers:173Issues:0Issues:0

learn-sky130

Learning to do things with the Skywater 130nm process

License:MITStargazers:1Issues:0Issues:0
Language:Jupyter NotebookStargazers:978Issues:0Issues:0

project-based-learning

Curated list of project-based tutorials

License:MITStargazers:199156Issues:0Issues:0

Python

All Algorithms implemented in Python

Language:PythonLicense:MITStargazers:184720Issues:0Issues:0

JavaScript

Algorithms and Data Structures implemented in JavaScript for beginners, following best practices.

Language:JavaScriptLicense:GPL-3.0Stargazers:32183Issues:0Issues:0

freeCodeCamp

freeCodeCamp.org's open-source codebase and curriculum. Learn to code for free.

Language:TypeScriptLicense:BSD-3-ClauseStargazers:402992Issues:0Issues:0

alacritty

A cross-platform, OpenGL terminal emulator.

Language:RustLicense:Apache-2.0Stargazers:55836Issues:0Issues:0

Win-Debloat-Tools

Re-imagining Windows like a minimal OS install, already debloated with minimal impact for most functionality.

Language:PowerShellLicense:MITStargazers:5192Issues:0Issues:0

CadenceSKILL-Python

Inter Process Communication (IPC) between Python and Cadence Virtuoso

Language:PythonStargazers:2Issues:0Issues:0

bag

BAG framework

Language:PythonLicense:NOASSERTIONStargazers:41Issues:0Issues:0

testbench

ethernet or rs232 remote control with various scpi command for different instrument (lecroy oscilloscope, hp/agilent/keysight pulse generator, power supply, oven ...)

Language:PythonStargazers:13Issues:0Issues:0

neorv32

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Language:VHDLLicense:BSD-3-ClauseStargazers:1562Issues:0Issues:0
Language:VerilogLicense:Apache-2.0Stargazers:43Issues:0Issues:0

blackmagic

In application debugger for ARM Cortex microcontrollers.

Language:CLicense:GPL-3.0Stargazers:3221Issues:0Issues:0

cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

Language:SystemVerilogLicense:NOASSERTIONStargazers:938Issues:0Issues:0

core-v-mcu

This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.

Language:SystemVerilogLicense:NOASSERTIONStargazers:165Issues:0Issues:0

freedom-u-sdk

Freedom U Software Development Kit (FUSDK)

Language:BitBakeStargazers:271Issues:0Issues:0

riscv-isa-sim

Spike, a RISC-V ISA Simulator

Language:CLicense:NOASSERTIONStargazers:2383Issues:0Issues:0