riscv / riscv-bitmanip

Working draft of the proposed RISC-V Bitmanipulation extension

Home Page:https://jira.riscv.org/browse/RVG-122

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Verilog source for the extension

DuyTrandeLion opened this issue · comments

Hello, may I ask where can I find the verilog source for this extension? Thanks.

there is no definitive "source" for the extensions but there are reference implementations https://github.com/riscv/riscv-bitmanip/tree/main-history/verilog