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riscv / riscv-bitmanip

Working draft of the proposed RISC-V Bitmanipulation extension

Home Page:https://jira.riscv.org/browse/RVG-122

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Zbs: shamt[5]=1 reserved for RV32

slobodova opened this issue · comments

commented

This is more a comment than an issue,: For BCLRI, BSETI, BEXTI, BINVI, there is a comment that
"For RV32, the encodings corresponding to shamt[5]=1 are reserved."
This does not make much sense since shamt for RV32 is only 5 bits, and in all cases the immediate bit where shamt[5] resides for RV64 is always 0 for those instructions. Maybe it would be better to leave that comment out.