riscv-non-isa / riscv-asm-manual

RISC-V Assembly Programmer's Manual

https://jira.riscv.org/browse/RVG-4

riscv-non-isa/riscv-asm-manual Issues

wrong instruction generation
Closed a month ago
Change branch from "master" to "main"
Closed 3 months ago1
Two suggested improvements to the pseudo instruction table
Closed 3 months ago3
Nothing can be found except the readme and license file.
Closed 6 months ago1
enhancement request: please could a pdf version, or pdf frindlier version be created?
Closed 6 months ago2
manual does not mention unsigned load insn, l{b|h|w}u
Closed 6 months ago2
Compile-time rounding-mode specification in [inline] assembly
Closed 9 months ago1
Code size reduction specification (`C`, `Zca`, `Zcd`, `Zcf` and other `Zc*` extensions)
Closed a year ago11
`.option (no)?relax` and label differences
Closed a year ago1
Linker relaxation ignores .option norvc
Updated a year ago6
Z*inx should require Zicsr
Closed a year ago
sfence.vma pseudoinstruction forms are undocumented
Updated a year ago2
Document immediate encoding for addi
Closed a year ago7
Proposal for a common convention for synonyms for register ABI names in hand-coded assembler
Closed 2 years ago8
Add an "lga" pseudoinstruction for GOT loads even in non-PIC
Closed 2 years ago
Missing LICENSE file
Closed 3 years ago2
how does `%hi` work for RISC-V 64?
Closed 3 years ago6
Typos
Closed 4 years ago4
Cover more pseudoinstructions, as it was done in riscv-spec-v2.2
Closed 4 years ago3
Pseudoinstruction examples don't work for RV64
Updated 4 years ago2
Will the "tail" pseudo instruction always get transformed to the "jalr" instruction?
Closed 4 years ago9
ELF question
Closed 4 years ago2
unrecognized opcode `ld a1,a0'
Closed 4 years ago3
RISC-V simulator
Updated 4 years ago
sp -4
Closed 4 years ago2
typo: Paragraph `Load and Store Global` duplicates
Closed 4 years ago1
c.addi should be nzimm (non zero imm)
Closed 4 years ago2
unable to stop relaxation
Closed 4 years ago2
c.addi x2,0b111111 operands
Closed 4 years ago5
c.lwsp
Closed 4 years ago2
unable to assemble "jal x0,0x1f
Closed 4 years ago2
gnu as produced wrong byte code
Closed 4 years ago3
jalr issue
Closed 4 years ago3
Question on the relative addressing example
Closed 4 years ago3
Is the "Load Immediate" example accurate?
Closed 4 years ago2
Manual is missing links for riscv instruction set documentation
Closed 6 years ago3
what is .option {rvc,norvc,pic,nopic,push,pop} RISC-V options?
Closed 6 years ago2
Specifying ordering on atomic instructions
Updated 6 years ago2
Setup instructions
Updated 6 years ago
.half, .word, .dword directives don't imply natural alignment on gas
Closed 6 years ago1
How to display one string to the console(terminal) by asm program?
Closed 6 years ago4
Some doubts about pseudoinstruction "sw rd,symbol,rt".
Closed 6 years ago4
How to understand the syntax of “0(a0)” ?And what's the meaning of "puts" and "shutdown"?
Closed 6 years ago10
It would be a great help for beginners to have common code snippets
Closed 6 years ago1
Minor typo in example
Closed 7 years ago2