BOOM: The Berkeley Out-of-Order RISC-V Processor

riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

boom-attacks

Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)

riscv-coremark

Setup scripts and files needed to compile CoreMark on RISC-V

fpga-zynq

Support for Rocket Chip on Zynq FPGAs

boom-template

DEPRECATED. Please use Chipyard (https://github.com/ucb-bar/chipyard) to build BOOM

rocket-chip

Rocket Chip Generator

dromajo

RISC-V RV64GC emulator designed for RTL co-simulation

riscv-boom.github.io

BOOM Website: News, Docs, and more!

boom-gcc

cobra

riscv-boom-doc

[Deprecated] Old documentation for the BOOM processor