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rggen / rggen-systemverilog

SystemVerilog RTL and UVM RAL model generators for RgGen

Home Page:https://github.com/rggen/rggen

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Enhance Identifier class

taichi-ishitani opened this issue · comments

commented

Enhance Identifier class for verilog plugin:

  • Add optional lsb and width arguments to array item selection.
    • lsb and width are used to get part of an array item