Reed Foster's repositories

uCPUvhdl

An 8-bit soft processor in VHDL

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pynq-audio

RTL and python for using the ADAU1761 audio codec on the Pynq-Z2 board from TUL

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cdl

Circuit Description Language

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common-gate-model

Matlab small signal model for a common gate amplifier (fabricated with InGaZnO TFTs)

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fpga-pitch-shifter

an implementation of autotune on an FPGA

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r32

32 bit CPU based on the MIPS instruction set

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lambdaCPU

A 32 bit CPU based on the MIPS instruction set

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u8

8-bit CPU with sdram controller and advanced peripherals

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voltage-2022s-workshop

MIT CPW workshop for Voltage

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image-compression

final project for 18.065

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swarming-pattern-formation

final project for 18.354

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halfband-polyphase-fir

cycle-accurate simulation of heavily-optimized FIR implementation of a half-band polyphase filter using DSP48s

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halfband_polyphase_test

Synthesizable verilog for 4GS/s decimating halfband FIR filter

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NIME

Digital musical instrument design framework created for MIT course 21M.370

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phidl

Python GDS layout and CAD geometry creation

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physics-simulator

Rigid body physics simulator

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Venus838

Development of a library to command and retrieve data from the Skytraq Venus 838 Chip

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