User data from Github https://github.com/rafaelcalcada
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Company:Siemens EDA
Location:Netherlands
Home Page:https://www.linkedin.com/in/rafaelcalcada/
GitHub:@rafaelcalcada
RISC-V 32-bit microcontroller developed in Verilog
Checks the equivalence between AIGs using BDDs
LibSteel is a software library providing an API to control RISC-V Steel
Technology mapper for FPGAs based on And-Inverter Graphs (AIGs) and K-Cuts