Rachmad Putra (rachmadvwp)

rachmadvwp

Geek Repo

Company:TU Wien & NYU Abu Dhabi

Location:Wien, AT & Abu Dhabi, UAE

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Rachmad Putra's repositories

ANN_continual_learning

PyTorch implementation of various methods for continual learning (XdG, EWC, online EWC, SI, LwF, GR, GR+distill, RtF, ER, A-GEM, iCaRL).

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brian2

Brian is a free, open source simulator for spiking neural networks.

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OpenRAM

An open-source static random access memory (SRAM) compiler.

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SNN4Agents

SNN4Agents: A Framework for Developing Energy-Efficient Embodied Spiking Neural Networks for Autonomous Agents

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adapt

Fast Emulation of Approximate DNN Accelerators in PyTorch

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analogNAS

Analog AI Neural Architecture Search (analog-nas) is a modular and flexible framework to facilitate implementation of Analog-aware Neural Architecture Search.

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awesome-model-quantization

A list of papers, docs, codes about model quantization. This repo is aimed to provide the info for model quantization research, we are continuously improving the project. Welcome to PR the works (papers, repositories) that are missed by the repo.

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caffe

Caffe: a fast open framework for deep learning.

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CARLsim4

CARLsim is an efficient, easy-to-use, GPU-accelerated software framework for simulating large-scale spiking neural network (SNN) models with a high degree of biological detail.

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CHIPKIT

CHIPKIT: An agile, reusable open-source framework for rapid test chip development

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chisel3

Chisel 3

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CLsurvey

Continual learning of neural networks with 11 state-of-the-art methods and 4 baselines. Codebase of the continual learning survey: "A continual learning survey: Defying forgetting in classification tasks." arXiv preprint arXiv:1909.08383 (2019)."

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CNNs_EmbedSyst

CNN classification and profiling on high performance edge systems

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cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

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corsair

Control and Status Register map generator for HDL projects

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cs-video-courses

List of Computer Science courses with video lectures.

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FEATHER

A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching

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gem5

This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.

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gemmini

Berkeley's Systolic Array Generator

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iverilog

Icarus Verilog

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LoAS

LoAS: Fully Temporal-Parallel Datatflow for Dual-Sparse Spiking Neural Networks, MICRO 2024.

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PiDRAM

PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory techniques. Prototype on a RISC-V rocket chip system implemented on an FPGA. Described in our preprint: https://arxiv.org/abs/2111.00082

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SCALE-Sim-v2

Repository to host and maintain scale-sim-v2 code

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TinyLLaVA_Factory

A Framework of Small-scale Large Multimodal Models

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ultralytics

NEW - YOLOv8 🚀 in PyTorch > ONNX > OpenVINO > CoreML > TFLite

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verilator

Verilator open-source SystemVerilog simulator and lint system

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