Lucian Petrica's repositories
100G-fpga-network-stack-core
This repo contains the Limago code
ACCL
Accelerated Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
AlveoLink
This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multiple Alveo cards.
brevitas
Brevitas: quantization-aware training in Pytorch
easy-markdown-to-github-pages
Convert Markdown files in Github to a full website using Github Pages
finn
Fast, Scalable Quantized Neural Network Inference on FPGAs
finn-hlslib
Vivado HLS library for FINN
hacc
ETHZ Heterogeneous Accelerated Compute Cluster
hls_sim_headers
Headers required for simulating designs targeted at Vivado HLS
hlslib
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
Interactive-brokers-python-api-guide
The code used for the article "Interactive Brokers Python API (Native) – A Step-by-step Guide" on the AlgoTrading101 Blog
pyverilator
Python wrapper for verilator model
test_pages
Foo bar
Vitis_Accel_Examples
Vitis_Accel_Examples
xacc
Xilinx Adaptive Compute Research Clusters (XACC) Resources Page
XRT
Xilinx Run Time for FPGA
xup_vitis_network_example
VNx: Vitis Network Examples