qindon9's repositories
axis_udp
This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supported. The project was tested on Xilinx 7-series FPGA with 10G Ethernet MAC IP-core
Language:VerilogMIT000
fpga-drive-aximm-pcie
Example designs for FPGA Drive FMC
Language:TclMIT000
fpga-network-stack
Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
Language:C++BSD-3-Clause000
FPGA-peripherals
:seedling: :snowflake: Collection of open-source peripherals in Verilog
Language:VerilogGPL-2.0000
LoRaMac-node
Reference implementation and documentation of a LoRa network node.
Language:CNOASSERTION000
Meshtastic-device
Device code for the Meshtastic ski/hike/fly/customizable open GPS radio
Language:C++GPL-3.0000
plutosdr-fw
PlutoSDR Firmware
Language:ShellNOASSERTION000
u-boot
"Das U-Boot" Source Tree
Language:C000
u-boot-xlnx
The official Xilinx u-boot repository
Language:C000