Beast code in Giters

Pratik Bhuran's repositories

Voting machine implemented in verilog

Language:Verilog9 10

VHDL implementation of Up counter.

Language:VHDL1 10

Language:Python000

Responsive frontend webpage design using Bootstrap 5

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FPGA 101 lessons/labs

Language:PythonBSD-2-Clause000

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Random Access Memories designed in Verilog

Language:VerilogBSD-2-Clause000

Verilog designs that are parameterized to fit any value of parameter.

Language:VerilogGPL-3.0000

Config files for my GitHub profile.

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RAM designs

Language:Verilog000

Responsive frontend webpage design using CSS and Javascript

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Detect the sequence 11x1 in verilog using mealy FSM.

Language:Verilog000

Language:VerilogGPL-3.0000

Basic web scraping program

Language:Python010