This PCB will allow a 65(c)02 CPU to emulate a CSG/MOS 7501/8501 CPU.
The 6502 address, data, and r/w lines are fed through the CPLD so they cna be optionally tri-stated, and the on-board PIO port lines 0-6 are emulated.
This circuit was sucessfully tested on a Commodore C16 with a SD2IEC floppy emulator.
Some pictures of the circuit installed and running:
Copyright (C) 2018 Jim Brain, RETRO Innovations
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