pg1770's repositories
SPI_WishBone_RA
Simulated Wishbone Bus Signals control Microchip SPI RAM model
kakoune
mawww's experiment for a better code editor
linux-xlnx
The official Linux kernel from Xilinx
sega-system-for-fpga
FPGA Sega in Verilog, for Xilinx Virtex, circa 2002. Has an emulator thrown in, to simplify FPGA debugging.
django
The Web framework for perfectionists with deadlines.
JUCE
The JUCE cross-platform C++ framework.
PluginParameters
Basic parameter engine suitable for VST and AU audio plugins
BeatCounter
Detect tempo in BPM for a track
verilog-pong-game
Pong game on an FPGA in Verilog.
PONG
PONG game on Nexys3, in Verilog.
verilog
A Verilog parser for Haskell.
sockit_cdc
clock domain crossing FIFO
JUCE-API-Documentation
Auto-generated class API documentation for the JUCE c++ library.
ec0
Version of the ec engineering calculator suitable for older versions of python
SimpleDJ
A self-contained set of cross platform applications and audio plugins.
DSPFilters
A Collection of Useful C++ Classes for Digital Signal Processing
verilog-processor
7-instruction 8-bit processor implemented in Verilog
verilog-6502
A Verilog HDL model of the MOS 6502 CPU
SD-stopwatch
stopwatch verilog
mdsynth
FPGA-based synthesizer in VHDL for the Xilinx Spartan-3A and Spartan-3E Starter Kits
fft-dit-fpga
Verilog module for calculation of FFT.
brainfuck-processor
A brainfuck system in Verilog
Verilog-UART
Verilog UART Module
verilog-vga-controller
A very simple VGA controller written in verilog