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peterpengwei / Microbench_HARP

A set of RTL designs that quantify the architectural parameters

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Microbench_HARP

A set of RTL designs that quantify the architectural parameters

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A set of RTL designs that quantify the architectural parameters

License:Apache License 2.0

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Language:Verilog 79.0%Language:C++ 13.4%Language:SystemVerilog 7.3%Language:Forth 0.3%