Questions Running Coremark Test
nerdylye opened this issue · comments
Hi, I am new to this and followed the tutorial steps to run coremark test on cv32w40p core. The simulation can be run but the output is a little weird because the iterations/sec is 0 and the coremark score does not show. May I know if it is supposed to be like this?
The command I used to run is make veri-test TEST=coremark
with Verilator version 5.012
The toolchain I used is from RISC-V Compiler Toolchain - lowRISC provides a pre-built GCC based toolchain
Hi @nerdylye, thanks for your interest in CORE-V.
I am not the right person to answer your question, but perhaps @silabs-robin is. Robin is the verification engineer at SiLabs who first committed the Coremark test.
BTW, which branch of CORE-V-VERIF are you using? I ask because the CV32E40P (v2) is in active development and the lastest-n-greatest version is on the cv32e40p/dev
branch.
Hi @nerdylye
I think this is linked to your toolchain and if it is supporting to print Floating-Point or not.
For instance pre-built RISC-V toolchain used for CV32E40Pv1 were not containing anything to allow any printf of Floating-Point numbers (mainly because it implies much larger newlib library).
But you can still compute your Coremark/MHz score using the reported number of cycles (Total ticks).
Hi @MikeOpenHWGroup, thank you for your reply. I think I'm using CV32E40Pv1 because I do not see this branch cv32e40p/dev
in my directory.
Hi @pascalgouedo, thank you for your reply. I see, so the simulation is running fine am I correct?
I also tried doing the same thing on CV32E40S and CV32E40X cores but both are not working. Is it because Verilator is not supported for these cores?
Hi @nerdylye
Yes simulation is OK as confirmed by "Correct operation validated" sentence.
For core version you surely use cv32e40v2 RTL as I guess you are using master branch.
For the E40X and E40S I don't know.
But you can still compute your Coremark/MHz score using the reported number of cycles (Total ticks).
Using CV32E40Pv2 and latest toolchain, I got:
CoreMark 1.0 : 2.977777 / GCC13.0.1 20230313 (experimental) -mabi=ilp32 -march=rv32im -O3 -falign-functions=16 -funroll-all-loops -falign-jumps=4 -finline-functions -Wall -pedantic -nostartfiles -static -DPERFORMANCE_RUN=1 -DITERATIONS=1 -DHAS_STDIO=1 -DHAS_PRINTF=1 -DHAS_FLOAT=1
I'm getting error like this for CV32E40S and CV32E40X cores, even when running hello-world test.
Hi @nerdylye, we like to keep GitHub Issues focused on a single topic. Please open a second issue for this one.
Ok got it, thank you!