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openhwgroup / core-v-verif

Functional verification project for the CORE-V family of RISC-V cores.

Home Page:https://docs.openhwgroup.org/projects/core-v-verif/en/latest/index.html

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test perf_counters_instructions failing in cv32e20

MaartenArts opened this issue · comments

commented

The test tests/programs/custom/perf_counters_instructions is failing in the cv32e20.
It was ported from the cv32e40.

There is a difference in reset values for mcountinhibit and mhpmevent csrs.
An issue has been created to specicfy the reset values for the cv32e20:
PoR value of mcountinhibit CSR is not documented #142 openhwgroup/cve2#142

Once the specification for these csrs has been reviewed and updated, an RTL issue might be raised to make the modifcation in the HW, and if needed the test case perf_counters_instructions for which this ticket was raised will be updated.