Seeking Assistance with SERVANT Integration on Nexys A7 via Eclipse

[cmenendezzz]

Hello!
I am excited to share that I have successfully implemented SERVANT on my Nexys A7 FPGA board. My primary objective now is to utilize its UART port for communication. I have prior experience implementing other RISC-V processors and debugging them through Eclipse, and I'm eager to replicate the same process with the SERV CPU.

However, during my exploration of the Zephyr documentation, I encountered some challenges. Specifically, I noticed that there are missing includes in the repository, such as:
#include <drivers/timer/system_timer.h>
and

#include "verilated_vcd_c.h"
#include "Vservant_sim.h"

I am hopeful that you can help clarify this issue and provide guidance for configuring SERVANT via Eclipse. Your assistance in this endeavor would be greatly appreciated.

Thank you in advance for your support.

[Olof Kindgren]

SERV doesn't have a debug interface, so it will not be able to communicate with a debugger at runtime.

Regarding the first include, system_timer.h belongs to Zephyr, so if you have set up Zephyr according to the instructions in the SERV README, it should be found automatically.

The other includes you mention are only relevant for when you run a simulation of Servant under Verilator. Those files are created by Verilator when it "verilates" the code (i.e. turning the verilog into a C++ model).

I'm not sure if this helps you, but I'm afraid your expectations of running SERV through eclipse like other CPUs won't work all that well.