james_gu's starred repositories
free-programming-books
:books: Freely available programming books
30-Days-Of-Python
30 days of Python programming challenge is a step-by-step guide to learn the Python programming language in 30 days. This challenge may take more than100 days, follow your own pace. These videos may help too: https://www.youtube.com/channel/UC7PNRuno1rzYPb1xLa4yktw
PythonPark
Python 开源项目之「自学编程之路」，保姆级教程：AI实验室、宝藏视频、数据结构、学习指南、机器学习实战、深度学习实战、网络爬虫、大厂面经、程序人生、资源分享。
influential-cs-books
Most influential books on Computer Science/programming
how-to-write-makefile
跟我一起写Makefile重制版
explore-python
:green_book: The Beauty of Python Programming.
verilog-ethernet
Verilog Ethernet components for FPGA implementation
wujian100_open
IC design and development should be faster，simpler and more reliable
deep-learning-from-scratch
《深度学习入门-基于Python的理论与实现》，包含源代码和高清PDF(带书签)；慕课网imooc《深度学习之神经网络(CNN-RNN-GAN)算法原理-实战》；《菜菜的机器学习sklearn》
FPGA_Webserver
A work-in-progress for what is to be a software-free web server for static content.
vscode-terosHDL
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
Computer-Science-Textbooks
Collect some CS textbooks for learning.
hpc-python
Python in High Performance Computing
cocotb-test
Unit testing for cocotb
myhdl-resources
A collection of awesome MyHDL tutorials, projects and third-party tools.
Designing-a-Custom-AXI-Master-using-BFMs
A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models
efficient_checksum-offload-engine
Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream interface.
xdma_dsc_byp_cltr
VHDL Bypass descriptor controller for Xilinx DMA IP for PCIe
10-gigabit-ethernet-mac-verification
Verification of a 10 Gigabit Ethernet MAC using a SystemVerilog OOP Testbench