nuaaceieyty's starred repositories

ollama

Get up and running with Llama 3.2, Mistral, Gemma 2, and other large language models.

dify

Dify is an open-source LLM app development platform. Dify's intuitive interface combines AI workflow, RAG pipeline, agent capabilities, model management, observability features and more, letting you quickly go from prototype to production.

Language:TypeScriptLicense:NOASSERTIONStargazers:46995Issues:349Issues:4020

MiniCPM-V

MiniCPM-V 2.6: A GPT-4V Level MLLM for Single Image, Multi Image and Video on Your Phone

Language:PythonLicense:Apache-2.0Stargazers:12132Issues:99Issues:532

xla

A machine learning compiler for GPUs, CPUs, and ML accelerators

Language:C++License:Apache-2.0Stargazers:2606Issues:42Issues:346

Awesome-Efficient-LLM

A curated list for Efficient Large Language Models

awesome-multiple-object-tracking

Resources for Multiple Object Tracking (MOT)

NearPy

Python framework for fast (approximated) nearest neighbour search in large, high-dimensional data sets using different locality-sensitive hashes.

Language:PythonLicense:MITStargazers:763Issues:36Issues:65

MQSim

MQSim is a fast and accurate simulator modeling the performance of modern multi-queue (MQ) SSDs as well as traditional SATA based SSDs. MQSim faithfully models new high-bandwidth protocol implementations, steady-state SSD conditions, and the full end-to-end latency of requests in modern SSDs. It is described in detail in the FAST 2018 paper by Arash Tavakkol et al., "MQSim: A Framework for Enabling Realistic Studies of Modern Multi-Queue SSD Devices" (https://people.inf.ethz.ch/omutlu/pub/MQSim-SSD-simulation-framework_fast18.pdf)

Language:C++License:MITStargazers:273Issues:28Issues:54

skillbridge

A seamless python to Cadence Virtuoso Skill interface

Language:PythonLicense:LGPL-3.0Stargazers:178Issues:10Issues:159

DRAMPower

Fast and accurate DRAM power and energy estimation tool

Language:C++License:NOASSERTIONStargazers:122Issues:14Issues:56

CHARM

CHARM: Composing Heterogeneous Accelerators on Versal ACAP Architecture

Language:C++License:MITStargazers:119Issues:6Issues:15

Skill

my cadence/virtuoso/icfb skill functions develloped over the years

Language:Emacs LispStargazers:114Issues:12Issues:0

ParlayANN

A library of algorithms for approximate nearest neighbor search in high dimensions, along with a set of useful tools for designing such algorithms.

Language:C++License:MITStargazers:107Issues:6Issues:11

SpikeYOLO

Offical implementation of "Integer-Valued Training and Spike-Driven Inference Spiking Neural Network for High-performance and Energy-efficient Object Detection" (ECCV2024 Oral)

Language:PythonLicense:AGPL-3.0Stargazers:65Issues:5Issues:3

pyquafu

PyQuafu is designed for users to construct, compile, and execute quantum circuits on quantum devices on Quafu using Python.

Language:PythonLicense:Apache-2.0Stargazers:65Issues:4Issues:52
Language:VerilogLicense:Apache-2.0Stargazers:38Issues:2Issues:1
Language:PythonStargazers:23Issues:4Issues:0

silicon-menagerie

Menagerie of models trained on SAYCam (and more)

Language:PythonLicense:MITStargazers:20Issues:4Issues:0

chipgptft

Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework (DAC 2024)

DRAMSpec

A High-Level DRAM Timing, Power and Area Exploration Tool

Language:C++License:NOASSERTIONStargazers:18Issues:7Issues:3

HybridSim

Simulator of a memory controller to connect DRAMSim and FlashDIMMSim into one unified memory

Language:C++License:NOASSERTIONStargazers:17Issues:2Issues:0

DRIM4HLS

DUTH RISC V Microprocessor for High Level Synthesis

Language:C++License:Apache-2.0Stargazers:10Issues:2Issues:0

chisel-npu

Chisel implementation of Neural Processing Unit for System on the Chip

Language:ScalaStargazers:10Issues:3Issues:0

qdao

Full State Quantum Circuit Simulation Beyond Memory Limit

Language:PythonLicense:Apache-2.0Stargazers:10Issues:1Issues:12
Language:C++License:MITStargazers:8Issues:0Issues:0
Language:PythonLicense:MITStargazers:8Issues:1Issues:2

RRAMSpec

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

Language:C++License:NOASSERTIONStargazers:8Issues:7Issues:0

chipgptv

Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation (ICCAD 2024)

Language:VerilogStargazers:6Issues:0Issues:0

sasiml

An extensible and fully programable cycle-accurate Spatial Architecture simulator for Machine Learning Workloads. Described in detail in the IEEE TC 2023 paper by Orosa et al. at https://arxiv.org/abs/2202.02310

Language:PythonLicense:MITStargazers:5Issues:6Issues:1