nlwmode

Awesome-Logic-Synthesis

A collection of the Logic Synthesis about peoples/papers/projects/tutorials...

Cpp_Interview_Guide

C++开发相关面试题目：涉及C++面试常问题、设计模式、数据结构、操作系统及网络等。完善中...

ifpga-mapper

iFPGA mapper for technology mapping in logic synthesis.

circuit-parser

C++ parsing library for simple formats used in logic synthesis and formal verification

functional-completeness

functional completeness

pointcloud_to_laserscan

Converts a 3D Point Cloud into a 2D laser scan.

synthesis_graph

aiger

AIGER And-Inverter-Graph Library

armPick

benchmarks

EPFL logic synthesis benchmarks

cudd

CUDD stands for Colorado University Decision Diagram. It is a package for the manipulation of Binary Decision Diagrams (BDDs), Algebraic Decision Diagrams (ADDs) and Zero-suppressed Binary Decision Diagrams (ZDDs).

espresso

logic synthesis tool

figure-plot-nlwmode

gprof2dot

Converts profiling output to a dot graph.

LSOracle

AI-driven logic synthesis oracle

MEC

Mapping Equivalence Checking

mvsis

logic synthesis tool

navigation2

ROS2 Navigation

nlwmode

nlwmode.github.io

my personal website.

ORB_SLAM3

ORB-SLAM3: An Accurate Open-Source Library for Visual, Visual-Inertial and Multi-Map SLAM

ORB_SLAM3_Localization

map reused for Mono-Inertial Localization.

orbslam-map-saving-extension

pointclout_to_gridmap

This is a 3D pointcloud map convert to 2D grid map procress.

RTL-benchmark

A collection of popular benchmarks range from sequential to combinational circuit benchmarks.

symbiflow-docs

Documentation for SymbiFlow

symbiflow-examples

Example designs showing different ways to use SymbiFlow toolchains.

truthtable2qiskit

wujian100_open

IC design and development should be faster，simpler and more reliable

yosys

Yosys Open SYnthesis Suite