This repository is a collection of URLs related to High-Level Synthesis (HLS), a framework to convert C, C++, and others to HDL language.
- Flexible Communication Avoiding Matrix Multiplicationon FPGA with High-Level Synthesis [Code]
- hlslib: Software Engineering for Hardware Design [Code]
- On the HLS Design of Bit-Level Operations and CustomData Types
- High-level synthesis and arithmetic optimizations: Doctoral thesis on HLS and float datatype optimization.
- High-Level Synthesis with Vivado HLS: 152 pages presentation slices relates to overview of HLS.
- Vivado HLS –Tips and Tricks
Below are sections for resources relates to HLS implemention of neural network.
- ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network.
- GUINNESS: A GUI based binarized Neural NEtwork SyntheSizer toward an FPGA.
- FPGA_AI_Edge_Contest_2019: Sample scripts for FPGA-based AI Edge Contest 2019.
- finn-hlslib: HLS library for hardware acceleration of Quantized Neural Network using FINN.
- hls4ml: A Python module for converting deep learning module (Tensorflow, Keras and Pytorch), to HLS format.
- RFNoC-HLS-NeuralNet: Using hls4ml to implement the neural network inference in FPGA fabric for RF signal processing.
- lenet5_hls: LeNet-5 implementation with Xilinx SDSoC.
- yolov2_xilinx_fpga:
- AccDNN: Converter of the Caffe trained deep neural network to the FPGA RTL level implementation
- A-convolution-kernel-implemented-by-Vivado-HLS
- fracBNN: A high performance binarized neural networks published in (FPGA 2021).
- iSmartDNN: Light-weighted neural network inference for object detection on small-scale FPGA board.
- XJTU-Tripler
- spooNN
- SkyNet SkyNet, a new hardware-efficient DNN specialized in object detection and tracking.
- pp4fpgas-cn-hls: HLS Project for pp4fpgas-cn running on Pynq-Z1/Z2 board
MIT License