The objectives of this assignment are:
- To create a C++ code that generates a Carry Ripple Adder and a Carry Lookahead Adder in Verilog.
- To compare the power, area, timing of both the adders.
The objectives of this assignment is:
- To write a C++ code that generates a Parameterized Pipelined Wallace tree multiplier
- To study the effects of pipelining on Latency, throughput and area.