nguyenquanicd's repositories
UvmEnvUartApb
This is the UVM environment for UART-APB IP core. This environment contains full UVM components. It is only used for studing and invetigating the UVM env.
AllArbiterRTLCode
RTL code of some arbitration algorithm
SystemCScpuCA
This is the example of Cycle Accurate (CA) model. It is the Simple CPU (SCPU) is described in SystemC language.
apbUartUvmSystemC
A SystemC UVM environment for UART-APB
JtagProgramming
This is the example to explain "How to program a memory via JTAG?"
FPGA_Starter
Xilinx FPGA Starter
Aes128_ECB_CBC_CFB_OFB_CTR
AES128 IP core supports ECB, CBC, CFB, OFB and CTR mode
QuestaSimTutorial
Examples for performing the QuestaSim simulator on Windows
SynchronousFIFO
Synchronous FIFO with the configured parameters
BasicSynEnv
This is the basic synthesis environtment
crcCalculator
Synthesis RTL code of CRC calculator
Python4RTLDesigner
The scripts are developed for RTL or logic designer.
SynchronousLIFO
Synchronous LIFO with the configured parameters
VG_Specification
All specifications of VG project