murattokez

ROS-LaserScan-To-Pointcloud-Odometry

2d laser scan data to 3d point cloud

3D-Mapping-Using-2D-LiDAR-ROS

3D Mapping using 2D LiDAR

Voxelnet

:mag_right: :oncoming_automobile: :articulated_lorry: :walking: :bike: 3D objects detections in LIDAR point clouds for autonomous driving

SFA3D

Super Fast and Accurate 3D Object Detection based on 3D LiDAR Point Clouds (The PyTorch implementation)

ADAS-Car-using-Raspberry-Pi

ADAS Car - with Collision Avoidance System (CAS) - on Indian Roads using LIDAR-Camera Low-Level Sensor Fusion. DIY Gadget built with Raspberry Pi, RP LIDAR A1, Pi Cam V2, LED SHIM, NCS 2 and accessories like speaker, power bank etc

jfpga_i2c_master

FPGA I2C Master

PDV

Point Density-Aware Voxels for LiDAR 3D Object Detection (CVPR 2022)

ece_4305

Code associated with Cal Poly Pomona's ECE 4305

handson-ml3

A series of Jupyter notebooks that walk you through the fundamentals of Machine Learning and Deep Learning in Python using Scikit-Learn, Keras and TensorFlow 2.

cocotbext-wishbone

awesome-sar

A curated list of awesome Synthetic Aperture Radar (SAR) software, libraries, and resources.

RaySAR

RaySAR is a 3D synthetic aperture radar (SAR) simulator which enables to generate SAR image layers related to detailed 3D object models. Moreover, it enables one to localize the 3D positions and surface intersection points related to reflected radar signals. In particular, RaySAR helps to understand the nature of signal multiple reflections at man-made objects (e.g. building structures) or artificial shapes. Scene models with different levels of detail can be processed - from digital surface models (DSMs) to high-end 3D structures - which can be defined in relative or absolute world coordinates. RaySAR can be run on Windows / Linux and is based on an adapted version of the open-source ray tracer POV-Ray.

dpm-rnn-public

Damage mapping with deep learning on satellite data

riscv-notes

riscv-spike-simulations

Running RISCV simulations and benchmarking on DSP algorithms on a RISC-V RV32IF architecture.

gem5_riscv

Configuration files for the gem5 simulator

verilog-axi

Verilog AXI components for FPGA implementation

litex_verilog_axi_test

Integration test of Verilog AXI modules (https://github.com/alexforencich/verilog-axi) with LiteX.

chiselv

A RISC-V Core (RV32I) written in Chisel HDL

tekno-kizil

KASIRGA - KIZIL Takımı Teknofest 2023 Çip Tasarımı - KIZIL İşlemci Projesi

kasirga_gok_2023

Kasırga - Gök Sayısal İşlemci Kategorisi RISC-V İşlemci Tasarımı