Muhammad Talha 's repositories
Football_management_system
Football management system DBMS python GUI project repository
bank_managment_system
This is c++ repository which is based on implementation of oops topics like single , multiple and multilevel inheritance
RV32I_Single_Cycle
This repository contains an implementation of a RV32I fetch pipeline microprocessor. The RV32I is a 32-bit RISC-V instruction set architecture, with the 'I' extension indicating the base integer instructions.
rv32I_single_cycle_logisim
An implementation of rv32i single cycle processor on logisim
Axi4_lite_interface
This repo contains an implementation of Axi4 lite interface on system verilog. Verilator and Vivado tools are used .
openlane
This is my openlane repository in which we perform synthesis of our design/module.
RTL_Practice
This repository contain basic verilog codes which include the implementation of DLD (digital logic desgin ) circuits.
sv_verilator
System verilog learning journey. Here in this repo you learn about how to write system verilog test bench using verilator tool
verilog_practice
Verilog is a hardware description language. This repo is basically a learning journey of verilog