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ADC sample using SG DMA of ZYNQ SoC FPGA (copy from ALINX example)
Languages
Language:VHDL 66.5%Language:HTML 20.1%Language:Coq 5.0%Language:C 3.0%Language:Verilog 2.1%Language:V 1.9%Language:C++ 0.4%Language:SystemVerilog 0.4%Language:Tcl 0.3%Language:Stata 0.1%Language:Shell 0.0%Language:Assembly 0.0%Language:Makefile 0.0%Language:Forth 0.0%Language:CartoCSS 0.0%Language:Pascal 0.0%