mnentwig's repositories
busbridge3
Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency
octsock5.jl
octsock5 : high-speed data exchange between Julia processes and others (e.g. in the future Octave)
EigenLevenbergMarquardtExample
cleaned up code sample for Eigen 3.4.0's "Levenberg-Marquardt" nonlinear optimization
ESP32_ADCrate_dbg
measures actual vs configured ADC sample rate on ESP32
libsk61
library with Octave (Matlab) utility functions
makeheaderspp
Automatic header generation for C++ classes
MNOGLA
MN's OS-independent Open-GL application host
nnDemo
Simple neural network implementation based on equations from the first chapters of M. Nielsen's book
octsock5_cSharp
high speed inter-process data interface, C# end
ods2console
Simple C++ example to traverse openoffice spreadsheet and dump all sheets to console
RpPicoW_connTest
Raspberry Pico W WIFI connection test using two boards
verilogSnippets
collection of Verilog code samples e.g. for FPGA
WS2812onESP32
web controlled LED strip
WS2812onRpPico
WS2812 LED control on Raspberry Pico via bit-banged GPIO (any pin, any number)
XAxiDmaSgCtrl
Xilinx / AMD XAXI DMA scatter-gather mode control