mnasser431998

bfu_dif_fft_rtl

The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor

nasser_chip

RISC-V-RAIV-GPGPU-docs

In this repository we host the docs of "Development of AI Framework based on RISC-V RAIV GPGPU Compatible with OpenCL" project.

simx-debug-env

debugging environment for simx

tt03-mnasser-demo

Verilog demo for Tiny Tapeout 03