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BBC Micro Model B/Master core

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beeb

BBC Micro Model B/Master core

This is a port of Mike Sterlings great BBC Micro on FPGA with major changes by Stephen Leary, David Banks and others.

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BBC Micro Model B/Master core

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Language:VHDL 51.3%Language:Verilog 29.2%Language:Tcl 8.4%Language:C++ 5.8%Language:SystemVerilog 4.8%Language:Makefile 0.6%