miaochenlu / M-Sim

Naive RISC-V Simulator

M-Sim

Simple RISC-V simulator

• Functional simulator https://github.com/miaochenlu/M-Sim

• Cycle-accurate simulator using systemC is under constructing https://github.com/miaochenlu/M-Sim/tree/Cmod

Reference

• Spike

• Gem5