This project corresponds with week one of nand2Tetris. Chips are implemented in Hardware Description Language. In the project, students are provided with a nand chip and must describe an implementation for each chip listed here. I implemented the chips in the recommended order; for each chip implementation, I only depended on the chips which I had already implemented. Here is the recommended order: 0. Nand (provided, not implemented)
- Not
- And
- Or
- Xor
- Mux
- DMux
- Not16
- And16
- Or16
- Mux16
- Or8Way
- Mux4Way16
- Mux8Way16
- DMux4Way
- DMux8Way