Mehmood Saleem's repositories
avst_adder
Example setup for UVM driven Icarus Verilog Simulation
Language:D000
Language:CNOASSERTION000
dhcp-release
To release ip from DHCP server -- Python
dotnedit
my ~/.nedit/
000
ibex
Ibex is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, previously known as zero-riscy.
Language:SystemVerilogApache-2.0000
Modified-Laplacian-Score
Optimization of Laplacian Score
sensu-client
Sensu client in .Net