matsuda-slab / YOLO_ZYNQ_MASTER

Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA

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Implementation of YOLOv3-tiny on FPGA

Procedure

1. Prepare Development Environment

This flow requires environment or tools below.

  • Python3
    • torch
    • numpy
  • Vivado 2019.1
  • Vivado HLS 2019.1

So please switch your python environment so that torch and numpy are available, and set PATH to Vivado installed directory.

2. Synthesize and create IP

In this directory run make. Some minutes later, core IPs for YOLO will be created automatically. You will find those IPs in 'ip' directory.

Reference

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Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA


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