Beast code in Giters

m-kru's repositories

Examples of the VHDL syntax, libraries, packages, practices etc.

Language:VHDL300

Example project layout for reconfigurable computing projects.

100

Language:VHDL200

fp2p - FPGA Port To Pin. Utility for safe and reusable port to pin assignment in multi-board FPGA designs.

Language:PythonGPL-2.01000

FuseSoC is a package manager and a set of build tools for FPGA/ASIC development

Language:PythonBSD-2-Clause100

VHDL 2008/93/87 simulator

Language:VHDLGPL-2.0100

An abstraction library for interfacing EDA tools

Language:PythonBSD-2-Clause100

Support for automatic address map generation and address decoding logic for Wishbone connected hierachical systems

Language:Python100

Hardware Description Language Server

Language:GoGPL-2.0300

Example for recreating GHDL issue.

Language:VHDL100

General Cores FuseSoc Library

Language:Tcl100

Language:VHDL300

Parallel synchronous scrambler

Language:VHDL200