Giters
m-kru
/
vhdl-simple
Library for simple VHDL entities
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m-kru/vhdl-simple Issues
G_WIDTH G_INPUT_WIDTH, G_OUTPUT_WIDTH
Closed
3 years ago
Unify port naming convention.
Closed
3 years ago
Comments count
3
Think about replacing clk_enable_i
Closed
3 years ago
Unify indentation in .core files
Closed
4 years ago
Use VHDL 2008 everywhere.
Closed
4 years ago
Library name.
Closed
4 years ago
Make G_REGISTER_OUTPUTS consistent.
Closed
4 years ago
Comments count
1
Add description for entites in .core files
Updated
4 years ago
Distinction between clock enable and enable ports.
Updated
4 years ago
Saturated adders are not put into the vhdl_simple library.
Closed
4 years ago