Luca Colombini (lukipedio)

lukipedio

Geek Repo

Company:CAEN S.p.A.

Location:Italy

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Luca Colombini's repositories

i2c_master_uvvm

i2c master with UVVM I2C BFM used in testbench

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vivado-test-docker

Dockerfile with Vivado for CI

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ces_util_lib

CES VHDL utility library, with packages, memories, FIFOs, Clock Domain Crossing and more useful VHDL modules

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joplin

Joplin - an open source note taking and to-do application with synchronization capabilities for Windows, macOS, Linux, Android and iOS. Forum: https://discourse.joplinapp.org/

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UVVM

Open Source VHDL Verification Component Framework for making structured VHDL testbenches for verification of FPGA and ASIC.

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vivado-project-template

Template for Xilinx Vivado projects

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ac_inout_psu

VHDL implementation of signal processing, control and communication associated with a single phase grid connected power supply

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BERT

Bit-Efficient Replicator Tech for X, Y, Z axis motor control (3D printers)

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drawio-desktop

Official electron build of diagrams.net

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eda_tools

A Dockerfile with a collections of ready to use open source EDA tools: Yosys, SimbiYosys (with Z3, boolector and Yices2), nextpnr-ice40, netxpnr-ecp5, nextpnr-gowin, Amaranth HDL, Silice and Verilator.

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embeddedsw

Xilinx Embedded Software (embeddedsw) Development

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fifo

Simple vhdl fifo

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github-facts

GitHub-based statistics highlighting interesting facts about the HDL industry

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Html-Css-Recap

HTML, CSS & JavaScript Recap

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jadaq

Just Another DAQ

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lfsr-example

A PN9 sequence checker for the AD9645 analog-to-digital converter

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petalinux-docker

Dockerfile to build images with Petalinux 2018.1~2019.2

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python-demoapp

Simple Python Flask web application designed for running in containers for demos

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SCISDK

SciCompiler Software Development Kit User Guide

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tdd-intro

Example of Test Driven Design with VUnit

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travis-hdl

Demonstrating continuous integration of hdl codes using travis-ci

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vunit

VUnit is a unit testing framework for VHDL/SystemVerilog

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