LI XIANGWEI's starred repositories
Floating-Point-ALU-in-Verilog
32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.
cyclostationary
Cyclostationary analysis
Vitis_Accel_Examples
Vitis_Accel_Examples
Vitis-Tutorials
Vitis In-Depth Tutorials
fucking-algorithm
刷算法全靠套路,认准 labuladong 就够了!English version supported! Crack LeetCode, not only how, but also why.
systolic-array
A DSL for Systolic Arrays
python-fmcw
Tutorials on frequency modulated continuous wave (FMCW) and Chirp Sequence Modulation RADAR algorithms.
fpga_readings
Recipe for FPGA cooking
lihang-code
《统计学习方法》的代码实现
awesome-grpc
A curated list of useful resources for gRPC
FPGADesignElements
A self-contained online book containing a library of FPGA design modules and related coding/design guides.
SystolicArrayDemo
Python code to show how a systolic array works. Written for https://medium.com/@antonpaquin/whats-inside-a-tpu-c013eb51973e
TensorFlow2.0-Examples
🙄 Difficult algorithm, Simple code.