lllbbbyyy / FPGA-OV2640

This project uses verilog to implement interaction with OV2640 camera, Bluetooth slave module and VGA display on FPGA.

FPGA-OV2640

This project uses verilog to implement interaction with OV2640 camera, Bluetooth slave module and VGA display on FPGA.

What did this project do?

This project uses the OV2640 camera to capture image information, use the FPGA board for image buffering and processing image information, and then display the image on the display in real time through VGA. Through Bluetooth, you can use a mobile phone to remotely control different processing methods to display different Type of filter mode. The selected mode is displayed on the FPGA board through a digital tube.

Applicable environment and equipment

External modules used in the project

1. OV2640 Camera Board
2. VGA PS2 Board
3. Bluetooth Slave UART Board

FPGA motherboard

Nexys 4 DDR This is the reference manual for the motherboard

Engineering environment

Vivado 2016.2

Related files and core code

For easy access, the written source code is stored in the code folder. The constraint file is stored in the xdc folder. You can connect peripherals according to the constraint file, or modify the constraint file as needed. The bitstream file generated by the project is stored in the bit folder. Other project files (such as IP core files) are stored in the default folder in the project

License

MIT LICENSE

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