Libre Silicon Alliance

Libre Silicon Alliance's repositories

process

Language:TeX87 110

qtflow

Free open source EDA tools

Language:C++LGPL-3.064 10 1

PearlRiver

1st Testwafer for LibreSilicon

Language:TeX29 60

magic-8.2

Magic VLSI Layout Tool

Language:C19 60

coriolis

autorouter forked from https://www-soc.lip6.fr/git/coriolis.git

Language:C++15 50

alf_parser

ALF parser implementation

Language:ANTLRGPL-3.08 3 3

libresilicontalk

Language:TeX4 30

CMOS-555

LibreSilicon 1 um Technology clone of the well-known CMOS "triple-5"

Language:Makefile2 20

lefdef_parser

lefdef parser implementation

Language:ANTLRGPL-3.02 4 1

ansible-coriolis

ansible script installing coriolis with all dependencies

1 40

chisel-wishbone

WIP (not ready for use)

Language:Scala1 30

fpga-shells

Language:Scala1 30

hyperram

Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC

Language:Verilog1 30

lsc

Libre Silicon Compiler

Language:HaskellGPL-3.01 30

riscv-boom

Berkeley Out-of-Order Machine

Language:ScalaNOASSERTION1 30

ansible-qtflow

sets up qtflow in a vm

040

fir2dot

A quick and dirty block diagram generator for FIRRTL

Language:Scala030

firviewer

A viewer for the FIR format for showing what Chisel spits out

Language:Scala030

Keysight

Language:Python030

libresilicon.github.io

The project page for #LibreSilicon

Language:HTMLMIT030

QtProcessPlanner

The QtProcessPlanner suppsed to be used on tablets in clean rooms

Language:QML030

SauMauPing1

SauMauPing SoC rev.1

Language:C030

sifive-blocks

Common RTL blocks used in SiFive's projects

Language:ScalaApache-2.0030