Lucas Grativol Ribeiro's repositories
cnn_vhdl_generator
AUTOMATIC VHDL GENERATION FOR CNN MODELS
Language:VHDL000
darknet-zynq
Accelerating DNN inference and training on Zynq
Language:CNOASSERTION000
Language:Python000
flocora_eusipco24
flocora - Eusipco 2024
Language:Python000
gb-research
Game Boy hardware research
Language:VHDL000
hls4ml
Machine learning on FPGAs using HLS
Language:C++Apache-2.0000
SOTA-routine
SOTA routine for training CIFAR-10/CIFAR-100/ImageNet on standard ResNets
Language:PythonMIT000
tensil
Open source machine learning accelerators
Language:ScalaNOASSERTION000
Language:Python000