Lâm Đỗ's starred repositories
open-logic
Open Logic HDL Standard Library
wavedrom.github.io
Digital timing diagram editor
Microsoft-Activation-Scripts
A Windows and Office activator using HWID / Ohook / KMS38 / Online KMS activation methods, with a focus on open-source code and fewer antivirus detections.
excalidraw
Virtual whiteboard for sketching hand-drawn like diagrams
Main_MiSTer
Main MiSTer binary and Wiki
awesome-cuda-and-hpc
🔥🔥🔥 A collection of some awesome public CUDA, cuBLAS, TensorRT and High Performance Computing (HPC) projects.
awesome-hdl
A curated list of awesome HDL, libraries, typical implementation and references.
verilog-axi
Verilog AXI components for FPGA implementation
extensions-generic
Netsky's fork of the official Paperback sources.
netskys-extensions
Netsky's sources for Paperback!
30-Days-Of-Python
30 days of Python programming challenge is a step-by-step guide to learn the Python programming language in 30 days. This challenge may take more than100 days, follow your own pace. These videos may help too: https://www.youtube.com/channel/UC7PNRuno1rzYPb1xLa4yktw
linux-insides
A little bit about a linux kernel
verilog-axis
Verilog AXI stream components for FPGA implementation
verilog-ethernet
Verilog Ethernet components for FPGA implementation
awesome-hdl
Hardware Description Languages
basic_verilog
Must-have verilog systemverilog modules