laanwj / rvsim

A RISC-V simulator implementing RV32G[C].

rvsim

A RISC-V simulator implementing RV32G, written in Rust.

See the documentation for usage.

Current limitations

• Supports only little-endian hosts.
• Windows support needs work.

License

Rvsim uses the MIT license, but includes portions of Berkeley SoftFloat, which uses the BSD 3-clause license. For details, see the COPYING.md file.